New Materials – Semiconductor Roadmap Enablers or Inhibitors?

James O’Neill, Ph.D.
SVP, Electronic Materials

For more than three decades, Moore’s Law has been the guiding principle behind semiconductor technology development driving cell density and device performance improvements every two or three years.   While dimensional scaling continues to provide significant increases in chip density, lithographic shrinking alone no longer enables improvements in device performance from one generation to the next.   Instead, device designers and process integration engineers have turned to new device architectures and novel materials to sate the appetite for performance.   Unprecedented levels of materials development are required to ensure that fabricators can produce chips that meet consumer demand for cutting-edge gadgets.  The introduction of copper interconnects, low-k BEOL dielectrics, high-k metal gates and high-mobility channel materials, each requiring a decade of development prior to its introduction into high volume manufacturing, are all examples of enhanced performance through materials.   Some have argued that these new materials have enabled the technology roadmap. However, each new material added to the fabrication process brings with it a new set of associated challenges.   The evolution from 65nm to 14nm technology saw a four-fold increase in the number of chemical elements used in the fabrication process and a 60% increase in the number of steps in the corresponding integrated process flow.  Such a trend results in an increase in costs, leading several companies to question whether the relative reduction in cost per gate that has historically driven the technology roadmap is sustainable below the 20nm node.  With an increase in process complexity comes a decrease in cycles of learning, making targeted yields increasingly difficult to achieve at the expected cadence of Moore’s Law.  Additionally, the relative immaturity of materials introduced particularly into the BEOL has resulted in significant reliability challenges.  The question then becomes, “are new materials that adversely affect process complexity, cost, cycle time, yield and reliability truly roadmap enablers?”   Given the current engagement model between semiconductor manufacturers and their materials suppliers, one might argue “no”.   Increasingly, innovative business partnerships and collaborations are required to accelerate process and materials understanding, yield improvement and reliability learning on advanced technology nodes.   Concurrently, the ongoing consolidation among leading edge semiconductor manufacturers may drive a model whereby the materials suppliers are embedded in their customer’s yield learning teams, thereby clarifying the materials challenges, improving supplier responsiveness, accelerating overall development cycles, and reducing new materials adoption costs.   Examples of how ATMI has approached this challenge both successfully and unsuccessfully will be discussed.